Parallelisierung von Simulated Annealing unter Verwendung von General Purpose Graphics Processing Units
- Date
- Apr 27, 2012
- Time
- 2:00 PM - 3:00 PM
- Speaker
- Felix Schmitt
- Affiliation
- Institut für Technische Informatik, Professur Mikrorechner
- Language
- en
- Main Topic
- Informatik
- Other Topics
- Informatik
- Description
- This work explores the parallelization of simulated annealing using General Purpose Graphics Processing Units. Simulated annealing is a standard algorithm for the optimization of problems with exponential runtime such as place and route which are important steps of the hardware synthesis for Field Programmable Gate Arrays. A prototype extension for VPR, GPUplace, has been developed which uses NVIDIA's CUDA programming approach for parallelization of the Half-Box Window Decomposition placement algorithm. Its implementation as well as optimization strategies are presented. Experimental results are compared with VPR's reference implementation regarding performance, result quality and annealing characteristics. Diese Veranstaltung wird unterstützt von Professur Mikrorechner.
Last modified: Apr 27, 2012, 9:37:25 AM
Location
TUD Andreas-Pfitzmann-Bau (Computer Science) (INF 1096 (Beratungsraum, 1. Etage))Nöthnitzer Straße4601069Dresden
- Homepage
- https://navigator.tu-dresden.de/etplan/apb/00
Organizer
TUD InformatikNöthnitzer Straße4601069Dresden
- Phone
- +49 (0) 351 463-38465
- Fax
- +49 (0) 351 463-38221
- Homepage
- http://www.inf.tu-dresden.de
Scan this code with your smartphone and get directly this event in your calendar. Increase the image size by clicking on the QR-Code if you have problems to scan it.
Legend
- Biology
- Chemistry
- Civil Eng., Architecture
- Computer Science
- Economics
- Electrical and Computer Eng.
- Environmental Sciences
- for Pupils
- Law
- Linguistics, Literature and Culture
- Materials
- Mathematics
- Mechanical Engineering
- Medicine
- Physics
- Psychology
- Society, Philosophy, Education
- Spin-off/Transfer
- Traffic
- Training
- Welcome